specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage conditi on (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. n3011 sy/d2408 ms 20081204-s00004 no.a1385-1/6 lv8400v overview the lv8400v is a 1-channel motor driver ic using d-mos fet for output stage and operates in one of the four modes under program control: forward, reverse, brake, and standby. as the p/n-channel structure is used in the h-bridge output stage, the lv8400v features minimal number of external component and low on-resistance (0.33 ? typical). this ic is optimal for driv ing motors that need large-current. functions ? 1-channel forward/reverse motor driver ? built-in constant current output circuit ? low power consumption ? built-in low voltage reset and thermal shutdown circuit ? low output on resistance 0.33 ? four mode function forward/reverse, brake, standby. specifications maximum ratings at ta = 25 c, sgnd = pgnd = 0v parameter symbol conditions ratings unit power supply voltage (for load) vm max -0.5 to 16.0 v power supply voltage (for control) v cc max -0.5 to 6.0 v output current i o max dc 1.2 a i o peak1 t 100ms, f = 5hz 2.0 a i o peak2 t 10ms, f = 5hz 3.8 a i out max dc 30 ma input voltage v in max -0.5 to v cc +0.5 v allowable power dissipation pd max mounted on a specified board * 800 mw operating temperature topr -20 to +85 c storage temperature tstg -55 to +150 c * specified board : 30mm 50mm 1.6mm, glass epoxy board. caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of absolu te maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of the ic may be degraded. please contact us for the further details. bi-cmos ic forward/reverse motor driver orderin g numbe r : ena1385a
lv8400v no.a1385-2/6 allowable operating conditions at ta = 25 c, sgnd = pgnd = 0v parameter symbol conditions ratings unit power supply voltage (for load) vm 4.0 to 15.0 v power supply voltage (for control) v cc 2.7 to 5.5 v input signal voltage v in 0 to v cc v input signal frequency f max duty = 50% 200 khz electrical characteristics ta = 25 c, v cc = 5.0v, vm = 12.0v, sgnd = pgnd = 0v, unless otherwise specified. parameter symbol conditions remarks ratings unit min typ max standby load current drain 1 imo1 en = 0v 1 1.0 a standby load current drain 2 imo2 en = 0v, v cc = 0v, each input pin = 0v 1 1.0 a standby control current drain ico en = 0v, in1 = in2 = 0v 2 1.0 a operating load current drain 1 im1 v cc = 3.3v, en = 3.3v 3 0.35 0.70 ma operating load current drain 2 im2 v cc = 5.0v, en = 5.0v 3 0.35 0.70 ma operating current consumption 1 ic1 v cc = 3.3v, en = 3.3v 4 0.6 1.2 ma operating current consumption 2 ic2 v cc = 5.0v, en = 5.0v 4 0.8 1.6 ma high-level input voltage v ih 2.7 v cc 5.5v 0.6 v cc v cc v low-level input voltage v il 2.7 v cc 5.5v 0 0.2 v cc v high-level input current (en,in1, in2, ictrl) i ih v in = 5v 5 12.5 25 50 a low-level input current (en,in1, in2, ictrl) i il v in = 0v 5 -1.0 a pull-down resistance value (en,in1, in2, ictrl) r dn 100 200 400 k output on resistance r on sum of top and bottom sides on resistance. 2.7v v cc 5.5v 6 0.33 0.5 constant current output leakage current i o leak en = 0v 7 1.0 a output constant current i out rset = 40 , internal reference = 0.2v 8 4.65 5.00 5.35 ma iset pin voltage v iset rset = 40 9 0.186 0.20 0.214 v constant current output on resistance r on io rset = 0 , i o = 5ma 10 20 30 low-voltage detection voltage vcs v cc voltage 11 2.10 2.25 2.40 v thermal shutdown temperature tth design guarantee * 12 150 180 210 c output block turn-on time tplh 13 0.5 1.0 s turn-off time tphl 13 0.5 1.0 s * design guarantee value and no measurement is performed. remarks 1. current consumption when output at the vm pin is off. 2. current consumption at the v cc pin when in all function stop. 3. current consumption at the vm pin when en is high. 4. current consumption at the v cc pin when en is high. 5. these input pins (en, in1, in2, and ictrl) have an internal pull-down resistor. 6. sum of the top and bottom side output on resistance. 7. leakage current when the constant current output is off. 8. current value that is determined by dividing the internal reference voltage (0.2v) by rset. 9. iset pin voltage when the constant current output block is active. 10. on resistance value of the constant current output block. 11. all output transistors are turned off if a low-voltage is detected. 12. all output transistors are turned off if the thermal prot ection circuit is activated. they are turned on again as the temperature goes down. 13. rising time from 10 to 90% and falling time from 90 to 10% are specified.
lv8400v no.a1385-3/6 package dimensions unit : mm (typ) 3178b pin assignment v cc in1 vm 1 2 3 4 5 6 7 8 in2 en ictrl iset sgnd iout 16 15 14 13 12 11 10 9 out1 out1 pgnd pgnd out2 out2 vm top view lv8400v sanyo : ssop16(225mil) 5.2 4.4 6.4 0.22 0.65 (0.33) 18 9 16 0.5 0.15 1.5max 0.1 (1.3) -20 0 20 40 60 80 100 0 1.0 0.8 0.6 0.4 0.2 pd max -- ta 85 0.42 ambient temperature, ta -- c allowable power dissipation, pd max -- w specified board: 30 50 1.6mm 3 glass epoxy board.
lv8400v no.a1385-4/6 block diagram reference voltage out1 + - out2 pgnd iout iset sgnd vm in1 v cc in2 ictrl en low- voltage and thermal protection cmos logic level shifter truth table en in1 in2 out1 out2 mode h h h l l brake h l h l forward l h l h reverse l l z z standby l - - z z all function stop en ictrl iout mode h h on constant current on l z constant current off l - z all function stop - : denotes a don't care value. z : high-impedance ? current drain is zero in all function stop mode. (excluding the current that flows out of the en pin) * all power transistors turn off and the motor stops driving when the ic is detected in low voltage or thermal protection mode.
lv8400v no.a1385-5/6 pin functions pin no. pin name description equivalent circuit 9 16 vm motor block power supply. (both pins must be connected) 1 v cc logic block power supply. 4 en logic enable pin. (pull-down resistor incorporated) 10k v cc 200k 2 3 5 in1 in2 ictrl driver output switching. (pull-down resistor incorporated) 10k v cc 200k 10 11 14 15 out1 out2 driver output. out2 out1 vm pgnd 6 8 iset iout constant current output. iout iset reference voltage 0.2v + - 7 sgnd logic block ground. 12 13 pgnd driver block ground. (both pins must be connected)
lv8400v ps no.a1385-6/6 sample application circuit v cc vm 4.0 to 15.0v to 15.0v vm iout i out iset sgnd in1 in2 cpu en ictrl rset out1 out1 out2 out2 pgnd pgnd m 2.7 to 5.5v 2.7 to 5.5v *1 : connect a kickback absorbing capac itor as close as possible to the ic. char acteristics deterioration of the ic or damage may result if an instantaneous voltage surge exceeding the maximum rated value is applied to the vm line due to coil kickback or other causes. *2 : the output constant current (i out ) is determined by the internal reference voltage and the sense resistor between the iset and sgnd pins. i out = internal reference voltage (0.2v) sense resistor (rset) from the formula above, i out = 5ma when a sense resistor of 40 is connected betwee n the iset and sgnd. this catalog provides information as of november, 2011. specifications and inform ation herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliab ility pr oducts, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these pr obab ilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd.
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